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Data Sheet No.PD60270
IRS2004(S)PbF
HALF-BRIDGE DRIVER
Features
* Floating channel designed for bootstrap operation * Fully operational to +200 V * Tolerant to negative transient voltage, dV/dt
immune * Gate drive supply range from 10 V to 20 V * Undervoltage lockout * 3.3 V, 5 V, and 15 V input logic compatible * Cross-conduction prevention logic * Internally set deadtime * High-side output in phase with input * Shutdown input turns off both channels * Matched propagation delay for both channels * RoHS compliant
Product Summary
VOFFSET IO+/VOUT ton/off (typ.) Deadtime (typ.) 200 V max. 130 mA/270 mA 10 V - 20 V 680 ns/150 ns 520 ns
Packages
Description
The IRS2004 is a high voltage, high speed power MOSFET and IGBT driver with dependent high- and lowside referenced output channels. Proprietary HVIC and 8 Lead SOIC 8 Lead PDIP latch immune CMOS technologies enable ruggedized IRS2004S IRS2004 monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver crossconduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates from 10 V to 200 V.
Typical Connection
up to 200 V VCC
VCC
IN SD
VB HO VS LO
TO LOAD
IN SD COM
(Refer to Lead Assignment for correct pin configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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IRS2004(S) PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB VS VHO VCC VLO VIN dVs/dt PD RthJA TJ TS TL
Definition
High-side floating absolute voltage High-side floating supply offset voltage High-side floating output voltage Low-side and logic fixed supply voltage Low-side output voltage Logic input voltage (IN & SD ) Allowable offset supply voltage transient Package power dissipation @ TA +25 C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (8 lead PDIP) (8 lead SOIC) (8 lead PDIP) (8 lead SOIC)
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 -- -- -- -- -- -- -55 --
Max.
225 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 50 1.0 0.625 125 200 150 150 300
Units
V
V/ns W C/W
C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential.
Symbol
VB VS VHO VCC VLO VIN TA
Definition
High-side floating supply absolute voltage High-side floating supply offset voltage High-side floating output voltage Low-side and logic fixed supply voltage Low-side output voltage Logic input voltage (IN & SD ) Ambient temperature
Min.
VS + 10 Note 2 VS 10 0 0 -40
Max.
VS + 20 200 VB 20 VCC VCC 125
Units
V
C
Note 1: Logic operational for VS of -5 V to +200 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details).
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IRS2004(S) PbF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25 C unless otherwise specified.
Symbol
ton toff tsd tr tf DT MT
Definition
Turn-on propagation delay Turn-off propagation delay Shutdown propagation delay Turn-on rise time Turn-off fall time Deadtime, LS turn-off to HS turn-on & HS turn-on to LS turn-off Delay matching, HS & LS turn-on/off
Min. Typ. Max. Units Test Conditions
-- -- -- -- -- 400 -- 680 150 160 70 35 520 -- 820 220 220 170 90 650 60 ns VS = 0 V VS = 200 V
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15 V and TA = 25 C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
VIH VIL VSD,TH+ VSD,THVOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VCCUVIO+ IO-
Definition
Logic "1" (HO) & Logic "0" (LO) input voltage Logic "0" (HO) & Logic "1" (LO) input voltage SD input positive going threshold SD input negative going threshold High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic "1" input bias current Logic "0" input bias current VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold Output high short circuit pulsed current Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.5 -- 2.5 -- -- -- -- -- -- -- -- 8 7.4 130 270 -- -- -- -- 0.05 0.02 -- 30 150 3 -- 8.9 8.2 290 600 -- 0.8 -- 0.8 0.2 0.1 50 55 270 10 5 9.8 V 9 -- mA -- VO = 0 V PW 10 s VO = 15 V PW 10 s A V IO = 2 mA VB = VS = 200 V VIN = 0 V or 5 V VIN = 5 V VIN = 0 V VCC = 10 V to 20 V
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IRS2004(S) PbF
Functional Block Diagram
VB
HV LEVEL SHIFT
Q PULSE FILTER R S VS HO
IN PULSE GEN
DEAD TIME & SHOOT-THROUGH PREVENTION
UV DETECT VCC
SD
LO
COM
Lead Definitions
Symbol Description
IN Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO Logic input for shutdown High-side floating supply High-side gate drive output High-side floating supply return Low-side and logic fixed supply Low-side gate drive output Low-side return
SD VB
HO VS VCC LO COM
Lead Assignments
1 2 3 4 VCC IN SD COM VB HO VS LO
8
7 6 5
1 2 3 4
VCC IN SD COM
VB HO VS LO
8
7 6 5
8 Lead PDIP
8 Lead SOIC
IRS2004PBF www.irf.com
IRS2004SPbF 4
IRS2004(S) PbF
IN
IN(LO)
50% 50%
SD
IN(HO)
ton tr 90% toff 90% tf
HO LO
LO HO
Figure 1. Input/Output Timing Diagram
10%
10%
Figure 2. Switching Time Waveform Definitions
50%
50%
IN
SD
50%
90%
tsd
HO
DT
10% DT
HO LO
90%
LO
90%
10%
Figure 3. Shutdown Waveform Definitions
Figure 4. Deadtime Waveform Definitions
IN (LO)
50% 50%
IN (HO)
LO
HO
10%
MT 90%
MT
LO
HO
Figure 5. Delay Matching Waveform Definitions
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IRS2004(S) PbF
1400 Turn-On Delay Time (ns)
1400
Turn-On Delay Time (ns)
1200 1000
1200 1000 800 600 400 200 0 10 12 14 16 18 20 Typ. Max.
Max.
800 600 400 200 0
Typ .
-5 0
-2 5
0
25
50
75
100 125
Temperature (C)
VBIAS Supply Voltage (V)
Figure 6A. Turn-On Time vs. Temperature
Figure 6B. Turn-On Time vs. Supply Voltage
1000 Max. Turn-On Delay Time (ns)
Turn-Off Delay Time (ns)
500 400 300 200 100 0
800 600 Typ. 400 200 0 0 2 4 6 8 10 12 14 16 18 20
Max.
Typ.
-50
-25
0
25
50
75
100
125
Input Voltage (V)
Temperature (C)
Figure 6C. Turn-On Time vs. Input Voltage
Figure 7A. Turn-Off Time vs. Temperature
500
1000 Turn-Off Delay Time (ns) 800 600 400 200 Typ 0
10 12 14 16 18 20
Turn-Off Delay Time (ns)
400 300 200 Typ. 100 0 Max.
Ma x .
0
2
4
6
8
10
12 14
16 18
20
VBIAS Supply Voltage (V)
Input Voltage (V)
Figure 7B. Turn-Off Time vs. Supply Voltage
Figure 7C. Turn-Off Time vs. Input Voltage
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IRS2004(S) PbF
500
Shutdown Delay Time (ns) Shutdown Delay Time (ns)
500 400 300 200 Typ. 100 0 10 12 14 16 18 20
VBIAS Supply Voltage (V)
400 300 200 100 0 -50
Max.
Max.
Typ.
-25
0
25
50
75
100
125
Temperature (C)
Figure 8A. Shutdown Time vs. Temperature
Figure 8B. Shutdown Time vs. Voltage
500
Turn-On Rise Time (ns) (
500
Turn-On Rise Time (ns)
400 300 200 100
Typ.
400 300 200 100
Typ. Max.
Max.
0 -50
0
-25 0 25 50 75 100 125
10
12
14
16
18
20
VBIAS Supply Voltage (V)
MAX
Temperature (C)
Figure 9A. Turn-On Rise Time vs. Temperature
200
Turn-Off Fall Time (ns)
V BIAS Supply Voltage (V)
Figure 9B. Turn-On Rise Time vs. Voltage
200
Turn-Off Fall Time (ns)
150 100
Max.
150
Max.
100 50
Typ.
50
Typ.
0 -50
0
-25 0 25 50 75 100 125
10
12
14
16
18
20
Temperature (C)
Input Voltage (V)
Figure 10A. Turn-Off Fall Time vs. Temperature
Figure 10B. Turn-Off Fall Time vs. Input Voltage
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IRS2004(S) PbF
1400 1200 1400 1200
Deadtime (ns)
1000 800 600 400 200 0 -50 -25 0 25 50 75 100 125 Typ. Min. Max.
Deadtime (ns)
1000 M ax. 800 600 Typ. 400 Mi. n 200 0 10 12 14 16 18 20
Temperature (C)
VBIAS Supply Voltage (V)
Figure 11A. Deadtime vs. Temperature
8 7
Input Voltage (V)
Figure 11B. Deadtime vs. Voltage
8 7 6
Input Voltage (V)
6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125
Min.
5 4 3 2 1 0 10 12 14 16 18 20
Min.
Temperature (oC)
V BIAS Supply Voltage (V)
Min
4 3.2 2.4 1.6
Figure12A. Logic "1" Input Voltage vs. Temperature
Min.
4 3.2 2.4 1.6
Figure 12B. Logic "1" Input Voltage vs. Supply Voltage
Max. 0.8 0 -50
Input Voltage (V)
Input Voltage (V)
M ax. 0.8 0
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (C)
Vcc Supply Voltage (V)
Figure 13A. Logic "0" (HO) & Logic "1" (LO) & Active SD Input Voltage vs. Temperature
Figure 13B. Logic "0" (HO) & Logic "1" (LO) & Active SD Input Voltage vs. Supply Voltage
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IRS2004(S) PbF
High Level Output Voltage (V)
0.5
High Level Output Voltage (V)
0.5 0.4 0.3 0.2 0.1
Typ.
0.4 0.3 0.2 0.1
Typ.
Max.
Max.
0.0 -50 -25 0 25 50 75 100 125 Temperature ( oC)
0.0 10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 14A. High Level Output Voltage vs. Temperature
0.5
Low Level Output Voltage (V) Low Level Output Voltage (V)
Figure 14B. High Level Output Voltage vs. Supply Voltage
0.5 0.4 0.3 0.2
Max.
0.4 0.3 0.2 0.1 0.0 -50 -25 0 25 50
o
Max. Typ.
0.1
Typ.
0
75 100 125
10
12
14
16
18
20
Temperature ( C)
V BIAS Supply Voltage (V)
Figure 15A. Low Level Output Voltage vs. Temperature
Offset Supply Leakage Current (A)
500 400 300 200 100 M ax. 0 -5 0 -2 5 0 25 50 75 100 125
Figure 15B. Low Level Output Voltage vs. Supply Voltage
Offset Supply Leakage Current (A)
500 400 300 200 100 0 0 100 200 300 400 500 600
Max.
Temperature (C)
VB Boost Voltage (V)
Figure 16A. Offset Supply Current vs. Temperature
Figure 16B. Offset Supply Current vs. Voltage
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IRS2004(S) PbF
150
150
VBS Supply Current (A)
120 90 60 30 0 -50 Typ. -25 0 25 50 75 100 125
VBS Supply Current (A)
120 90 60 30 Ty p. 0 10 12 14 16 18 20
Max.
Max .
Temperature (C)
VBS Floating Supply Voltage (V)
Figure 17A. VBS Supply Current vs. Temperature
700 700
Figure 17B. VBS Supply Current vs. Voltage
Vcc Supply Current (A)
600 500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 Typ. Max.
Vcc Supply Current (A)
600 500 400 300 200 100 Typ. 0 10 12 14 16 18 20 M ax.
Temperature (C)
Vcc Supply Voltage (V)
Figure 18A. Vcc Supply Current vs. Temperature
30
Figure 18B. Vcc Supply Current vs. Voltage
30
Logic 1" Input Current (A)
25 20 15 10 5 Typ. 0 -50 -25 0 25 50 75 100 125
Logic 1" Input Current (A)
25 20 15 10 5 0 10 12 14 16 18 20 Max. Typ.
Max.
Temperature (C)
Vcc Supply Voltage (V)
Figure 19A. Logic"1" Input Current vs. Temperature
Figure 19B. Logic"1" Input Current vs. Voltage
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IRS2004(S) PbF
Logic "0" Input Bias Current (A)
Logic "0" Input Bias Current (A)
6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 Temperature (C) Max
Logic "0" Input Bias C urrent (A)
6 5 4 3 2 1 0 10 12 14 16 18 20 Supply V oltage (V ) Max
Figure 20A. Logic "0" Input Bias Current vs. Temperature
11 10 9 8 7 6 -50 Typ. Min.
Vcc UVLO Threshold - (V) Vcc UVLO Threshold +(V)
Figure 20B. Logic "0" Input Bias Current vs. Voltage
11
Max.
10 Max. 9 Typ. 8 7 Min.
-25
0
25
50
75
100
125
6 -50
-25
0
25
50
75
100
125
Temperature (C)
Temperature (C)
Figure 21A. Vcc Undervoltage Threshold(+) vs. Temperature
500
Output Source Current (mA) Output Source Current (mA)
Figure 21B. Vcc Undervoltage Threshold(-) vs. Temperature
500
400 300 200 100 0 -50
Typ.
400 300 200 100 0
Typ. Min.
Min.
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (C)
VBIAS Supply Voltage (V)
Figure 22A. Output Source Current vs. Temperature
Figure 22B. Output Source Current vs. Voltage
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IRS2004(S) PbF
1000
Output Sink Current (mA) Output Sink Current (mA)
1000 800 600 400
Typ.
800 600 400 200 0 -50
Min. Typ.
200
Min.
0 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (C)
VBIAS Supply Voltage (V)
Figure 23A. Output Sink Current vs. Temperature
6
SD Input Threshold (+) (V)
Figure 23B. Output Sink Current vs. Supply Voltage
6
SD Input Threshold (+) (V)
5 4 3 2 1 -50
Max.
5 4 3 2 1
Max.
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (C)
Vcc Supply Voltage (V)
Figure 24A. SD Input Positive Going Threshold (+) vs. Temperature
Figure 24B. SD Input Positive Going Threshold (+) vs. Supply Voltage
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IRS2004(S) PbF
Case Outline
D A 5 B
FOOTPRINT 8X 0.72 [.028]
DIM A b c D
INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040
6 E
8
7
6
5 H 0.25 [.010] A
E
6.46 [.255]
1
2
3
4
e e1 H K L
8X 1.78 [.070]
.050 BASIC .025 BASIC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X
e e1
3X 1.27 [.050]
y
A C 0.10 [.004] y
K x 45
8X b 0.25 [.010]
A1 CAB
8X L 7
8X c
NOTES: 1. DIMENSIONING & TOLERANC ING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INC HES]. 4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE.
8 Lead SOIC
01-6027 01-0021 11 (MS-012AA)
8 Lead PDIP www.irf.com
01-6014 01-3003 01 (MS-001AB)
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IRS2004(S) PbF
Tape & Reel 8-lead SOIC
LOADED TAPE FEED DIRECTION
B A H
D F C
N OT E : CO NTROLLING D IM ENSION IN MM
E G
CA R R I E R T A P E D IM E N S I O N F O R 8 S O I CN
M etr ic Co d e A B C D E F G H M in 7 .9 0 3 .9 0 11 .7 0 5 .4 5 6 .3 0 5 .1 0 1 .5 0 1 .5 0 M ax 8.1 0 4.1 0 1 2. 30 5.5 5 6.5 0 5.3 0 n/ a 1.6 0 Im p er i al M in M ax 0. 31 1 0 .3 18 0. 15 3 0 .1 61 0 .4 6 0 .4 84 0. 21 4 0 .2 18 0. 24 8 0 .2 55 0. 20 0 0 .2 08 0. 05 9 n/ a 0. 05 9 0 .0 62
F
D C E B A
G
H
RE E L D IM E NS I O N S FO R 8 S O IC N
Co d e A B C D E F G H M etr ic M in M ax 32 9. 60 3 30 .2 5 20 .9 5 2 1. 45 12 .8 0 1 3. 20 1 .9 5 2.4 5 98 .0 0 1 02 .0 0 n /a 1 8. 40 14 .5 0 1 7. 10 12 .4 0 1 4. 40 Im p er i al M in M ax 1 2 .9 76 13 .0 0 1 0. 82 4 0 .8 44 0. 50 3 0 .5 19 0. 76 7 0 .0 96 3. 85 8 4 .0 15 n /a 0 .7 24 0. 57 0 0 .6 73 0. 48 8 0 .5 66
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IRS2004(S) PbF
LEADFREE PART MARKING INFORMATION
Part number
IRSxxxxx YWW? ?XXXX
Lot Code (Prod mode - 4 digit SPN code) IR logo
Date code
Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released
Assembly site code Per SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS2004PBF 8-Lead SOIC IRS2004SPbF 8-Lead SOIC Tape & Reel IRS2004STRPbF
The SOIC-8 is MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 11/27/2006
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